Samsung’s 12-Layer HBM4E Reportedly Clears Nvidia Qualification Tests

Samsung’s 12-layer HBM4E reportedly cleared quality checks with Nvidia and major data-center customers in late September. Order volumes, contract terms and delivery timing have not been confirmed.
A stacked high-bandwidth memory chip and wafer displayed in a semiconductor cleanroom A stacked high-bandwidth memory chip and wafer displayed in a semiconductor cleanroom

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Samsung Electronics has completed quality verification for its 12-layer HBM4E memory with Nvidia and other major data-center customers, according to a Hankyung.com report published Wednesday and summarized by Investing.com on Thursday. The testing was completed at the end of September, the reports said, marking a customer-qualification milestone for Samsung’s next-generation high-bandwidth memory.

The result is not confirmation of a supply contract. The available reporting does not identify order volumes, contract values or when Samsung would begin mass deliveries to each customer. Qualification indicates that a product has met a customer’s quality requirements; commercial supply arrangements are a separate step.

What the reported qualification establishes

The report identifies the chip as Samsung’s 12-layer HBM4E, the next generation of high-bandwidth memory, or HBM. Samsung’s evaluation reportedly covered Nvidia and major hyperscalers—large cloud and data-center operators that buy computing equipment at scale. Neither Nvidia nor Samsung was quoted confirming the specific test result in the reporting available Thursday.

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That distinction matters because HBM is designed for close integration with high-performance processors, and customer qualification is a prerequisite to use in a particular system. Passing tests can make a supplier eligible for business, but does not by itself establish that a customer has placed an order or that the product is shipping in volume.

Samsung’s published HBM4E specifications

Samsung presented HBM4E at Nvidia’s GTC event in March 2026, describing it as the successor to HBM4. The company said the product was designed to deliver 16 gigabits per second per pin and 4.0 terabytes per second of bandwidth. Those are Samsung’s stated product specifications, not independently reported measurements of the particular 12-layer chip said to have passed customer tests.

Samsung also described hybrid copper bonding as a technology intended to support future HBM stacks of 16 or more layers while reducing heat resistance compared with thermal compression bonding. The company’s March announcement showcased HBM4E, but did not establish that the particular 12-layer product had then completed customer qualification.

Why the milestone matters—and what remains unknown

HBM supplies data at high speed to processors used in artificial intelligence systems and data centers. As a result, memory performance and compatibility are important to accelerator makers and operators building large-scale computing infrastructure. A successful qualification with Nvidia and other large customers could broaden Samsung’s opportunity to compete for supply in that market, but the report does not quantify any likely business impact.

The development also comes as Samsung positions a range of memory products for AI infrastructure. In March, the company said its HBM4 was in mass production and designed for Nvidia’s Vera Rubin platform. That announcement concerned HBM4, not the reported HBM4E qualification, and does not specify production or delivery plans for the newer chip.

The next publicly verifiable steps would be further company disclosures or customer announcements describing orders, production and delivery. As of Thursday’s report, those details had not been confirmed. The qualification claim remains attributed to Hankyung.com’s reporting rather than a public announcement from Samsung or Nvidia.

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